An Implementation Method of HEVC Dataflow Graph Based on Reconfigurable Processer
Yun Zhu, Chuanzhan Hu, Xi’an University of Posts and Telecommunications, China; Lin Jiang, Xi’an University of Science and Technology, China; Xubang Shen, Xi'an Microelectronic Technology Research Institute, China
Session:
Reconfigurable Computing and Performance Evaluation
Track:
Signal Processing Systems: Design and Implementation (SPS)
Session Time:
Thu, 16 Dec, 09:00 - 11:00 Japan Standard Time (UTC +9) Thu, 16 Dec, 00:00 - 02:00 Coordinated Universal Time Wed, 15 Dec, 19:00 - 21:00 Eastern Standard Time (UTC -5) Wed, 15 Dec, 16:00 - 18:00 Pacific Standard Time (UTC -8)
Session Chair:
Junyong Deng, Xi'an University of Posts & Telecommunications