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TH3.I: Algorithm and Architecture Co-optimization

Session Type: Poster
Time: Thursday, 7 May, 16:30 - 18:30
Location: On-Demand
Session Chairs: Woon Seng Gan , Nanyang Technological University and jani boutellier, University of VAASA
 
   TH3.I.1: INDOOR HEADING DIRECTION ESTIMATION USING RF SIGNALS
         Yusen Fan; University of Maryland
         Feng Zhang; Origin Wireless Inc
         Chenshu Wu; University of Maryland
         Beibei Wang; Origin Wireless Inc
         K. J. Ray Liu; University of Maryland, College Park
 
   TH3.I.2: AN IMPROVED SELECTIVE ACTIVE NOISE CONTROL ALGORITHM BASED ON EMPIRICAL WAVELET TRANSFORM
         Shulin Wen; Nanyang Technological University
         Woon-Seng Gan; Nanyang Technological University
         Dongyuan Shi; Nanyang Technological University
 
   TH3.I.3: TOWARDS REAL-TIME, MULTI-VIEW VIDEO STEREOPSIS
         Jianwei Ke; University of Wisconsin-Madison
         Alex Watras; University of Wisconsin-Madison
         Jae-Jun Kim; University of Wisconsin-Madison
         Hewei Liu; University of Wisconsin-Madison
         Hongrui Jiang; University of Wisconsin-Madison
         Yu Hen Hu; University of Wisconsin-Madison
 
   TH3.I.4: ERNET FAMILY: HARDWARE-ORIENTED CNN MODELS FOR COMPUTATIONAL IMAGING USING BLOCK-BASED INFERENCE
         Chao-Tsung Huang; National Tsing Hua University
 
   TH3.I.5: A DSP ACCELERATION FRAMEWORK FOR SOFTWARE-DEFINED RADIOS ON X86_64
         Georgios Georgis; University of Surrey
         Alexios Thanos; University of Surrey
         Marcin Filo; University of Surrey
         Konstantinos Nikitopoulos; University of Surrey
 
   TH3.I.6: FAST SINGLE-VIEW 3D OBJECT RECONSTRUCTION WITH FINE DETAILS THROUGH DILATED DOWNSAMPLE AND MULTI-PATH UPSAMPLE DEEP NEURAL NETWORK
         Chia-Ho Hsu; National Tsing Hua University
         Ching-Te Chiu; National Tsing Hua University
         Chia-Yu Kuan; National Tsing Hua University
 
   TH3.I.7: PROCESSING CONVOLUTIONAL NEURAL NETWORKS ON CACHE
         João Vieira; INESC-ID, Instituto Superior Técnico, Universidade de Lisboa
         Nuno Roma; INESC-ID, Instituto Superior Técnico, Universidade de Lisboa
         Gabriel Falcao; Instituto de Telecomunicações, University of Coimbra
         Pedro Tomás; INESC-ID, Instituto Superior Técnico, Universidade de Lisboa
 
   TH3.I.8: LIGHTWEIGHT HARDWARE IMPLEMENTATION OF VVC TRANSFORM BLOCK FOR ASIC DECODER
         Ibrahim Farhat; VITEC
         Wassim Hamidouche; INSA Rennes
         Adrien Grill; VITEC
         Daniel Menard; INSA Rennes
         Olivier Déforges; Institut d'Electronique et de Télécommunications de Rennes / Institut Nationnal des Sciences Appliquées
 
   TH3.I.9: RGB-D BASED MULTI-MODAL DEEP LEARNING FOR FACE IDENTIFICATION
         Tzu-Ying Lin; National Tsing Hua University
         Ching-Te Chiu; National Tsing Hua University
         Ching-Tung Tang; National Tsing Hua University
 
   TH3.I.10: A REAL TIME IMPLEMENTATION OF A BAYER DOMAIN IMAGE DEBLURRING CORE FOR OPTICAL BLUR COMPENSATION
         Han-Sol Lee; Samsung Electronics
         Eundoo Heo; Samsung Electronics
         Wonseok Lee; Samsung Electronics
         Do-Chang Ahn; Samsung Electronics
         Jeonghyeon Cheon; Samsung Electronics
         Kyungho Kim; Samsung Electronics
         Kyunghwan Lee; Samsung Electronics
         Jeongguk Lee; Samsung Electronics
         Yunseok Choi; Samsung Electronics
         Soonkeun Chang; Samsung Electronics
 
   TH3.I.11: SELF-ATTENTIVE SENTIMENTAL SENTENCE EMBEDDING FOR SENTIMENT ANALYSIS
         Sheng-Chieh Lin; Academia Sinica
         Wen-Yuh Su; National Chengchi University
         Po-Chuan Chien; Academia Sinica
         Ming-Feng Tsai; National Chengchi University
         Chuan-Ju Wang; Academia Sinica
 
   TH3.I.12: DECIDABLE VARIABLE-RATE DATAFLOW FOR HETEROGENEOUS SIGNAL PROCESSING SYSTEMS
         Yujunrong Ma; University of Maryland
         Jiahao Wu; University of Maryland
         Shuvra Bhattacharyya; University of Maryland
         Jani Boutellier; University of Vaasa