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My ICASSP 2020 Schedule

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Paper Detail

Paper IDTH3.I.8
Paper Title LIGHTWEIGHT HARDWARE IMPLEMENTATION OF VVC TRANSFORM BLOCK FOR ASIC DECODER
Authors Ibrahim Farhat, VITEC, France; Wassim Hamidouche, INSA Rennes, France; Adrien Grill, VITEC, France; Daniel Menard, INSA Rennes, France; Olivier Déforges, Institut d'Electronique et de Télécommunications de Rennes / Institut Nationnal des Sciences Appliquées, France
SessionTH3.I: Algorithm and Architecture Co-optimization
LocationOn-Demand
Session Time:Thursday, 07 May, 16:30 - 18:30
Presentation Time:Thursday, 07 May, 16:30 - 18:30
Presentation Poster
Topic Design and Implementation of Signal Processing Systems: [DIS-PROG] Programmable Hardware (FPGA, SoC, ASIC and others) for DSP algorithms
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