Technical Program

Paper Detail

Note: All times are in Pacific Daylight Time (UTC -7)
Paper: G-3.2
Paper Title:  A High-Throughput LDPC Decoder Architecture for Satellite Communication
Authors:  Suwen Song, Zhongfeng Wang, Nanjing University, China
Session: VLSI for 5G/B5G Communications Systems (invited)
Location: Virtual G
Presentation Time: Tuesday, November 1, 08:00 - 09:00
Virtual Presentation:   Attend on Virtual Platform
Presentation:  Virtual
Topic:  Architectures and Implementation: Invited Session: VLSI for 5G/B5G Communications Systems