SS-L17: Algorithm-Hardware Co-Design of Neuromorphic Solutions for Signal Processing Applications
Fri, 19 Apr, 08:20 - 10:20 (UTC +9)
Location: Room E4
Session Type: Lecture
Session Co-Chairs: Peter A. Beerel, University of Southern California and Sumit Bam Shrestha, Intel
Track: Special Sessions
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Fri, 19 Apr, 08:20 - 08:40 (UTC +9)
SS-L17.1: Training Ultra-Low-Latency Spiking Neural Networks from Scratch
Fri, 19 Apr, 08:40 - 09:00 (UTC +9)
SS-L17.2: RECENT ADVANCES IN SCALABLE ENERGY-EFFICIENT AND TRUSTWORTHY SPIKING NEURAL NETWORKS: FROM ALGORITHMS TO TECHNOLOGY
Fri, 19 Apr, 09:00 - 09:20 (UTC +9)
SS-L17.3: ARE SNNS TRULY ENERGY-EFFICIENT? - A HARDWARE PERSPECTIVE
Fri, 19 Apr, 09:20 - 09:40 (UTC +9)
SS-L17.4: Hardware-Algorithm Co-design Enabling Processing-in-Pixel-in-Memory (P^2M) for Neuromorphic Vision Sensors
Fri, 19 Apr, 09:40 - 10:00 (UTC +9)