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My ICASSP 2020 Schedule

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Paper Detail

Paper IDWE2.I.2
Paper Title DMAZERUNNER: OPTIMIZING CONVOLUTIONS ON DATAFLOW ACCELERATORS
Authors Shail Dave, Aviral Shrivastava, Arizona State University, United States; Youngbin Kim, Yonsei University, Korea (South); Sasikanth Avancha, Intel, India; Kyoungwoo Lee, Yonsei University, Korea (South)
SessionWE2.I: Array-based Architectures for Energy-efficient Signal Processing Systems
LocationOn-Demand
Session Time:Wednesday, 06 May, 11:30 - 13:30
Presentation Time:Wednesday, 06 May, 11:50 - 12:10
Presentation Lecture
Topic Design and Implementation of Signal Processing Systems: [DIS-ARCH] Algorithm and architecture co-optimization
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