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My ICASSP 2020 Schedule

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Paper Detail

Paper IDFR3.I.6
Paper Title A HARDWARE ARCHITECTURE FOR RECONFIGURABLE INTELLIGENT SURFACES WITH MINIMAL ACTIVE ELEMENTS FOR EXPLICIT CHANNEL ESTIMATION
Authors George Alexandropoulos, National and Kapodistrian University of Athens, Greece; Evangelos Vlachos, University of Edinburgh, United Kingdom
SessionFR3.I: Signal Processing for Beyond 5G Communications
LocationOn-Demand
Session Time:Friday, 08 May, 15:15 - 17:15
Presentation Time:Friday, 08 May, 16:55 - 17:15
Presentation Lecture
Topic Special Sessions: Signal Processing for Beyond 5G Communications
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