| Paper ID | DIS-L1.3 |
| Paper Title |
EXPLORATION METHODOLOGY FOR BTI-INDUCED FAILURES ON RRAM-BASED EDGE AI SYSTEMS |
| Authors |
Alexandre Levisse, Marco Rios, Miguel Peon, David Atienza, Embedded Systems Laboratory (ESL) EPFL, Switzerland |
| Session | DIS-L1: Array-based Architectures for Energy-efficient Signal Processing Systems |
| Location | On-Demand |
| Session Time: | Wednesday, 06 May, 11:30 - 13:30 |
| Presentation Time: | Wednesday, 06 May, 12:10 - 12:30 |
| Presentation |
Lecture
|
| Topic |
Design and Implementation of Signal Processing Systems: [DIS-ARCH] Algorithm and architecture co-optimization |
| IEEE Xplore Open Preview |
Click here to view in IEEE Xplore |
| Virtual Presentation |
Click here to watch in the Virtual Conference |