| Paper ID | DIS-P2.12 |
| Paper Title |
DECIDABLE VARIABLE-RATE DATAFLOW FOR HETEROGENEOUS SIGNAL PROCESSING SYSTEMS |
| Authors |
Yujunrong Ma, Jiahao Wu, Shuvra Bhattacharyya, University of Maryland, United States; Jani Boutellier, University of Vaasa, Finland |
| Session | DIS-P2: Algorithm and Architecture Co-optimization |
| Location | On-Demand |
| Session Time: | Thursday, 07 May, 16:30 - 18:30 |
| Presentation Time: | Thursday, 07 May, 16:30 - 18:30 |
| Presentation |
Poster
|
| Topic |
Design and Implementation of Signal Processing Systems: [DIS-ARCH] Algorithm and architecture co-optimization |
| IEEE Xplore Open Preview |
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| Virtual Presentation |
Click here to watch in the Virtual Conference |