| Paper ID | DIS-P1.6 |
| Paper Title |
DNN-CHIP PREDICTOR: AN ANALYTICAL PERFORMANCE PREDICTOR FOR DNN ACCELERATORS WITH VARIOUS DATAFLOWS AND HARDWARE ARCHITECTURES |
| Authors |
Yang Zhao, Chaojian Li, Yue Wang, Pengfei Xu, Yongan Zhang, Yingyan Lin, Rice University, United States |
| Session | DIS-P1: Signal Processing for Emerging Applications: Machine Learning |
| Location | On-Demand |
| Session Time: | Tuesday, 05 May, 16:30 - 18:30 |
| Presentation Time: | Tuesday, 05 May, 16:30 - 18:30 |
| Presentation |
Poster
|
| Topic |
Design and Implementation of Signal Processing Systems: [DIS-ARCH] Algorithm and architecture co-optimization |
| IEEE Xplore Open Preview |
Click here to view in IEEE Xplore |
| Virtual Presentation |
Click here to watch in the Virtual Conference |