TP7b.1

Scaling AI/ML Hardware Powered by Non-Volatile Memory, Ultra-Dense Heterogeneous 3D, and Multi-Chiplet Integration

Samuel Dayo, Stanford University, United States; Tathagata Srimani, Carnegie Mellon University, United States; Robert M. Radway, University of Pennsylvania, United States; Subhasish Mitra, Stanford University, United States
Session:
TP7b: AI Accelerator Architectures Lecture
Track:
Architectures and Implementation
Location:
Room 7
Presentation Time:
Tue, 28 Oct, 15:30 - 15:55 PT (UTC -7)
Presentation
Discussion
Resources
No resources available.
Session TP7b
TP7b.1: Scaling AI/ML Hardware Powered by Non-Volatile Memory, Ultra-Dense Heterogeneous 3D, and Multi-Chiplet Integration
Samuel Dayo, Stanford University, United States; Tathagata Srimani, Carnegie Mellon University, United States; Robert M. Radway, University of Pennsylvania, United States; Subhasish Mitra, Stanford University, United States
TP7b.2: Configurable Architecture Design Automation (CADA): Enabling Compute-Efficient Dynamic Reconfigurable Systems
Chenkai Ling, Dejan Markovic, UCLA, United States
TP7b.3: Primitive-Based Acceleration of Brain-Inspired Hyperdimensional Computing for Edge Systems
Dhruv Parikh, Viktor Prasanna, University of Southern California, United States
TP7b.4: Derivation of LayerPipe Architecture using Variable Delayed Gradient Adaptive Filtering and Retiming
Nanda Unnikrishnan, Keshab Parhi, University of Minnesota Twin Cities, United States
Contacts