TA7b.1

FPGA Implementation of Bounded-precision Enumerative Sphere Shaping with Trellis Storage

Jasper Lagendijk, Yunus Can Gültekin, Marzieh Hashemipour-Nazari, Alex Alvarado, Alexios Balatsoukas-Stimming, Eindhoven University of Technology, Netherlands
Session:
TA7b: Accelerator Architectures for Communications and Machine Learning Lecture
Track:
Architectures and Implementation
Location:
Room 7
Presentation Time:
Tue, 28 Oct, 10:15 - 10:40 PT (UTC -7)
Presentation
Discussion
Resources
No resources available.
Session TA7b
TA7b.1: FPGA Implementation of Bounded-precision Enumerative Sphere Shaping with Trellis Storage
Jasper Lagendijk, Yunus Can Gültekin, Marzieh Hashemipour-Nazari, Alex Alvarado, Alexios Balatsoukas-Stimming, Eindhoven University of Technology, Netherlands
TA7b.2: VLSI Architecture of a Deep Unfolded ADMM-based Infinity Norm MIMO Detection
Shahriar Shahabuddin, Md Salman Sakib, Oklahoma State University, United States
TA7b.3: Variable Point: A Number Format for Area- and Energy-Efficient Multiplication of High-Dynamic-Range Numbers
Seyed Hadi Mirfarshbafan, Nicolas Filliol, Oscar Castañeda, Christoph Studer, ETH Zurich, Switzerland
TA7b.4: Outlier Detection Inference Acceleration in a Multi-Tier Wireless Sensor Network
Gregory Chekler, Nadya Mohamed, Joseph R. Cavallaro, Rice University, United States
Contacts