TU2.R8.1

Write Voltage Optimization to Increase Flash Lifetime in a Two-Variance Gaussian Channel

Ava Asmani, Semira Galijasevic, Richard Wesel, University of California, Los Angeles, United States

Session:
Coding and Access for Memory

Track:
13: Coding for Computation and Storage

Location:
Omega

Presentation Time:
Tue, 9 Jul, 11:30 - 11:50

Session Chair:
Ron Roth, Technion
Abstract
For a two-variance model of the Flash read channel that degrades as a function of the number of program/erase cycles, this paper demonstrates that selecting write voltages to maximize the minimum page mutual information (MI) can increase device lifetime. In multi-level cell (MLC) Flash memory, one of four voltage levels is written to each cell, according to the values of the most-significant bit (MSB) page and the least-significant bit (LSB) page. In our model, each voltage level is then distorted by signal-dependent additive Gaussian noise that approximates the Flash read channel. When performing an initial read of a page in MLC flash, one (for LSB) or two (for MSB) bits of information are read for each cell of the page. If LDPC decoding fails after the initial read, then an enhanced-precision read is performed. This paper shows that jointly designing write voltage levels and read thresholds to maximize the minimum MI between a page and its associated initial or enhanced-precision read bits can improve LDPC decoding performance.
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