FR3.R9.1

Modulo Sampling with 1-bit Side Information: Performance Guarantees in the Presence of Quantization

Neil Irwin Bernardo, University of the Philippines Diliman, Philippines; Shaik Basheeruddin Shah, Yonina Eldar, Weizmann Institute of Science, Israel

Session:
Signal Processing 1

Track:
12: Signal Processing

Location:
Lamda

Presentation Time:
Fri, 12 Jul, 14:35 - 14:55

Session Chair:
Anand Sarwate, Rutgers
Abstract
In this work, we investigate the relationship between the dynamic range and quantization noise power in modulo analog-to-digital converters (ADCs). An algorithm to recover the original signal from quantized modulo observations with 1-bit side information is analyzed. We prove that an oversampling factor of $\mathrm{OF} > 3$ and a quantizer resolution of $b > 3$ are sufficient for the modulo ADC to have better quantization noise suppression than a standard ADC without the modulo operator. Under this setting, the mean squared error (MSE) of modulo ADC is $\mathcal{O}\left(\frac{1}{\mathrm{OF^3}}\right)$ whereas that of a standard ADC is only $\mathcal{O}\left(\frac{1}{\mathrm{OF}}\right)$. Numerical results are presented to validate the derived performance guarantees.
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