MO2.L7: Digit Recognition – Low Power and Speed Challenge
Grand Challenge
Mon, 15 Sep, 10:00 - 11:30 Anchorage Time (UTC -8)
Location: Room 5 (GC1)
Session Type: Lecture
Track: Challenge Sessions
Click the to view the manuscript on IEEE Xplore Open Preview
Mon, 15 Sep, 10:00 - 10:45 Anchorage Time (UTC -8)

MO2.L7.1: MiNeuron: Minimal Neuron Realization for Fast FPGA SNN Inference Using Logic Optimization
Daniel Windhager, Lothar Ratschbacher, Silicon Austria Labs, Austria; Bernhard A. Moser, Software Competence Center Hagenberg, Austria; Michael Lunglmayr, Johannes Kepler University, Austria
Mon, 15 Sep, 10:45 - 11:30 Anchorage Time (UTC -8)

MO2.L7.2: SFATTI: SPIKING FPGA ACCELERATOR FOR TEMPORAL TASK-DRIVEN INFERENCE - A CASE STUDY ON MNIST
Alessio Caviglia, Filippo Marostica, Alessio Carpegna, Alessandro Savino, Stefano Di Carlo, Politecnico di Torino, Italy