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My ICASSP 2019 Schedule

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Paper Detail

Paper:DISPS-P2.8
Session:Algorithm and Architecture Optimization
Session Time:Thursday, May 16, 13:00 - 15:00
Presentation Time:Thursday, May 16, 13:00 - 15:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Compilers and tools for DSP implementation
Paper Title: AN HETEROGENEOUS COMPILER OF DATAFLOW PROGRAMS FOR ZYNQ PLATFORMS
Authors: Endri Bezati; École Polytechnique Fédérale de Lausanne 
 Simone Casale-Brunet; École Polytechnique Fédérale de Lausanne 
 Romuald Mosqueron; School of Business and Engineering Vaud HES-SO 
 Marco Mattavelli; École Polytechnique Fédérale de Lausanne