Paper: | DISPS-L2.3 | ||
Session: | Algorithm and Architecture Co-optimization | ||
Session Time: | Tuesday, May 14, 17:30 - 19:30 | ||
Presentation Time: | Tuesday, May 14, 18:10 - 18:30 | ||
Presentation: | Lecture | ||
Topic: | Design and Implementation of Signal Processing Systems: Programmable and reconfigurable DSP architectures | ||
Paper Title: | LOW-POWER PROGRAMMABLE PROCESSOR FOR FAST FOURIER TRANSFORM BASED ON TRANSPORT TRIGGERED ARCHITECTURE | ||
Authors: | Jakub Žádník; Tampere University | ||
Jarmo Takala; Tampere University |