Paper: | DISPS-L2.2 |
Session: | Algorithm and Architecture Co-optimization |
Session Time: | Tuesday, May 14, 17:30 - 19:30 |
Presentation Time: | Tuesday, May 14, 17:50 - 18:10 |
Presentation: |
Lecture
|
Topic: |
Design and Implementation of Signal Processing Systems: Algorithm and architecture co-optimization |
Paper Title: |
HARDWARE-FRIENDLY LDPC DECODING SCHEDULING FOR 5G HARQ APPLICATIONS |
Authors: |
Cing-Yi Liang; National Tsing Hua University | | |
| Mao-Ruei Li; National Tsing Hua University | | |
| Huang-Chang Lee; Chang Gung University | | |
| Hsin-Yu Lee; National Tsing Hua University | | |
| Yeong-Luh Ueng; National Tsing Hua University | | |