Technical Program

Paper Detail

Paper:DISPS-P1.11
Session:Design and Implementation of Emerging Signal Processing Systems: Machine Learning / Neuromorphic Computing / IoT
Location:Poster Area J, West Bar, First Floor
Session Time:Thursday, May 16, 08:00 - 10:00
Presentation Time:Thursday, May 16, 08:00 - 10:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: System-on-chip architectures for signal processing
Paper Title: Efficient Signal Reconstruction via Distributed Least Square Optimization on a Systolic FPGA Architecture
Manuscript Link:  Click here to view manuscript on IEEE Xplore
Authors: Muya Chang, Samantak Gangopadhyay, Tomer Hamam, Justin Romberg, Arijit Raychowdhury, Georgia Institute of Technology, United States