Technical Program

Paper Detail

Paper:DISPS-P1.2
Session:Design and Implementation of Emerging Signal Processing Systems: Machine Learning / Neuromorphic Computing / IoT
Location:Poster Area J, West Bar, First Floor
Session Time:Thursday, May 16, 08:00 - 10:00
Presentation Time:Thursday, May 16, 08:00 - 10:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Design and Implementation of emerging signal processing systems
Paper Title: A LOW-LATENCY SPARSE-WINOGRAD ACCELERATOR FOR CONVOLUTIONAL NEURAL NETWORKS
Manuscript Link:  Click here to view manuscript on IEEE Xplore
Authors: Haonan Wang, Wenjian Liu, Tianyi Xu, Jun Lin, Zhongfeng Wang, Nanjing University, China