Technical Program

Paper Detail

Paper:DISPS-L2.2
Session:Algorithm and Architecture Co-optimization
Location:Syndicate 4
Session Time:Tuesday, May 14, 17:30 - 19:30
Presentation Time:Tuesday, May 14, 17:50 - 18:10
Presentation: Lecture
Topic: Design and Implementation of Signal Processing Systems: Algorithm and architecture co-optimization
Paper Title: HARDWARE-FRIENDLY LDPC DECODING SCHEDULING FOR 5G HARQ APPLICATIONS
Manuscript Link:  Click here to view manuscript on IEEE Xplore
Authors: Cing-Yi Liang, Mao-Ruei Li, National Tsing Hua University, Taiwan; Huang-Chang Lee, Chang Gung University, Taiwan; Hsin-Yu Lee, Yeong-Luh Ueng, National Tsing Hua University, Taiwan