| Paper: | DISPS-P2.4 |
| Session: | Algorithm and Architecture Optimization |
| Location: | Poster Area J, West Bar, First Floor |
| Session Time: | Thursday, May 16, 13:00 - 15:00 |
| Presentation Time: | Thursday, May 16, 13:00 - 15:00 |
| Presentation: |
Poster
|
| Topic: |
Design and Implementation of Signal Processing Systems: Compilers and tools for DSP implementation |
| Paper Title: |
SOLVING MEMORY ACCESS CONFLICTS IN LTE-4G STANDARD |
| Manuscript Link: |
Click here to view manuscript on IEEE Xplore |
| Authors: |
Cyrille Chavet, Lab-STICC / Université Bretagne Sud, France; Fabrice Lozachmeur, Thomas Barguil, Université Bretagne Sud, France; Awais Sani Hussein, Philippe Coussy, Lab-STICC / Université Bretagne Sud, France |